1. Field of the Invention
The invention relates to an integrated circuit layout structure, and more particularly, to an integrated circuit layout structure with standard cells differing in cell height.
2. Description of the Prior Art
Semiconductor integrated circuits are one of the most important hardware bases in the modern information society. A key design point of the semiconductor industry is to increase integration of integrated circuits, and therefore to use the area of integrated circuits more efficiently.
Generally speaking, integrated circuits having complex functions are made up of many standard cells, each with basic functions. For example, standard cells of different kinds of logic gates, such as AND gates, OR gates, NOR gates, inverters, cells of flip-flops, adders and counters, are always used to realize complex integrated circuits. When designing an integrated circuit having specific functions, standard cells are selected. Next, designers draw out design layouts of the integrated circuit including the selected standard cells and real semiconductor integrated circuits are then manufactured according to the design layouts. For the convenience of integrated circuit design, a library including frequently used standard cells and their corresponding layouts are established by the designers. Therefore when designing an integrated circuit, a designer selects desired standard cells from the library of and places them in an automatic placement and routing (hereinafter abbreviated as APR) block. The standard cells may then be further interconnected with other elements in a variety of ways to perform desired functions. By selecting the cells from a library and placing them into APR blocks, a designer can quickly design complex functions without having to worry about the details of each individual transistor. And by realizing different layouts on different semiconductor/conductive/insulating layers and constructing electrical connections between those layers, the whole integrated circuits are formed.
Furthermore, for complying with requirements to different driving capabilities, standard cells are made of different cell heights. “Cell height” of a standard cell is referred to the number of tracks between the uppermost and lowermost points of the standard cell, and “track” is typically referred to one contact pitch. For example, a six-track standard cell means that a transistor channel width in the cell is six contact pitches wide. It is well-known to those skilled in the art that a standard cell with higher driving capability requires larger channel width. In other words, a standard cell with higher driving capability requires larger cell height. On the contrary, a standard cell with lower driving capability requires smaller channel with, that is, smaller cell height. When arranging and placing those standard cells of different cell heights into one APR block, not only the driving capabilities are in the designer's consideration, but also the requirements of electrical leakage and power consumption. Sometimes standard cells of different cell heights are all placed in one APR block, and thus such APR block includes cells of multi-heights. Or, standard cells are categorized and placed in different APR blocks according to their cell heights, and thus those APR blocks respectively include cells of single-height.
It is found that valuable areas in the APR block with cells of multi-heights are always wasted and complexities of circuit design and manufacturing processes are both increased. However, it is also found that in the APR blocks with cells of single-height, the high-speed APR and low power consumption APR are individually formed and extra connections are required. Undesirably, “integration” is not achieved by such arrangement. More severely, design for manufacturing (DFM) issue is generated by such arrangement.
Therefore, an integrated circuit layout structure that is able to comply with requirements of high-speed, low power consumption and superior space utilization efficiency is still in need.